\doxysection{RCC\+\_\+\+CRSInit\+Type\+Def Struct Reference}
\hypertarget{struct_r_c_c___c_r_s_init_type_def}{}\label{struct_r_c_c___c_r_s_init_type_def}\index{RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}}


RCC\+\_\+\+CRS Init structure definition.  




{\ttfamily \#include $<$stm32h7xx\+\_\+hal\+\_\+rcc\+\_\+ex.\+h$>$}

\doxysubsubsection*{Public Attributes}
\begin{DoxyCompactItemize}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_r_c_c___c_r_s_init_type_def_a9bbb4a0ff6d8bbf68bc01b566b946fd8}{Prescaler}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_r_c_c___c_r_s_init_type_def_aea4064c542d29150a92632119b8e214d}{Source}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_r_c_c___c_r_s_init_type_def_a1c7e141417a1115913ff856031f81a32}{Polarity}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_r_c_c___c_r_s_init_type_def_ab8dd9da2b1da68ae09c30c7da19355a1}{Reload\+Value}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_r_c_c___c_r_s_init_type_def_af7b100cc0c3331c736f9f9d1fca37119}{Error\+Limit\+Value}}
\item 
uint32\+\_\+t \mbox{\hyperlink{struct_r_c_c___c_r_s_init_type_def_a99f5012ef8ca6a5bcc882f9a5070699e}{HSI48\+Calibration\+Value}}
\end{DoxyCompactItemize}


\doxysubsection{Detailed Description}
RCC\+\_\+\+CRS Init structure definition. 

\label{doc-variable-members}
\Hypertarget{struct_r_c_c___c_r_s_init_type_def_doc-variable-members}
\doxysubsection{Member Data Documentation}
\Hypertarget{struct_r_c_c___c_r_s_init_type_def_af7b100cc0c3331c736f9f9d1fca37119}\index{RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}!ErrorLimitValue@{ErrorLimitValue}}
\index{ErrorLimitValue@{ErrorLimitValue}!RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}}
\doxysubsubsection{\texorpdfstring{ErrorLimitValue}{ErrorLimitValue}}
{\footnotesize\ttfamily \label{struct_r_c_c___c_r_s_init_type_def_af7b100cc0c3331c736f9f9d1fca37119} 
uint32\+\_\+t RCC\+\_\+\+CRSInit\+Type\+Def\+::\+Error\+Limit\+Value}

Specifies the value to be used to evaluate the captured frequency error value. This parameter must be a number between 0 and 0x\+FF or a value of \doxylink{group___r_c_c_ex___c_r_s___error_limit_default}{RCCEx CRS Error\+Limit\+Default} \Hypertarget{struct_r_c_c___c_r_s_init_type_def_a99f5012ef8ca6a5bcc882f9a5070699e}\index{RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}!HSI48CalibrationValue@{HSI48CalibrationValue}}
\index{HSI48CalibrationValue@{HSI48CalibrationValue}!RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}}
\doxysubsubsection{\texorpdfstring{HSI48CalibrationValue}{HSI48CalibrationValue}}
{\footnotesize\ttfamily \label{struct_r_c_c___c_r_s_init_type_def_a99f5012ef8ca6a5bcc882f9a5070699e} 
uint32\+\_\+t RCC\+\_\+\+CRSInit\+Type\+Def\+::\+HSI48\+Calibration\+Value}

Specifies a user-\/programmable trimming value to the HSI48 oscillator. This parameter must be a number between 0 and 0x3F or a value of \doxylink{group___r_c_c_ex___c_r_s___h_s_i48_calibration_default}{RCCEx CRS HSI48\+Calibration\+Default} \Hypertarget{struct_r_c_c___c_r_s_init_type_def_a1c7e141417a1115913ff856031f81a32}\index{RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}!Polarity@{Polarity}}
\index{Polarity@{Polarity}!RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}}
\doxysubsubsection{\texorpdfstring{Polarity}{Polarity}}
{\footnotesize\ttfamily \label{struct_r_c_c___c_r_s_init_type_def_a1c7e141417a1115913ff856031f81a32} 
uint32\+\_\+t RCC\+\_\+\+CRSInit\+Type\+Def\+::\+Polarity}

Specifies the input polarity for the SYNC signal source. This parameter can be a value of \doxylink{group___r_c_c_ex___c_r_s___synchro_polarity}{RCCEx CRS Synchro\+Polarity} \Hypertarget{struct_r_c_c___c_r_s_init_type_def_a9bbb4a0ff6d8bbf68bc01b566b946fd8}\index{RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}!Prescaler@{Prescaler}}
\index{Prescaler@{Prescaler}!RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}}
\doxysubsubsection{\texorpdfstring{Prescaler}{Prescaler}}
{\footnotesize\ttfamily \label{struct_r_c_c___c_r_s_init_type_def_a9bbb4a0ff6d8bbf68bc01b566b946fd8} 
uint32\+\_\+t RCC\+\_\+\+CRSInit\+Type\+Def\+::\+Prescaler}

Specifies the division factor of the SYNC signal. This parameter can be a value of \doxylink{group___r_c_c_ex___c_r_s___synchro_divider}{RCCEx CRS Synchro\+Divider} \Hypertarget{struct_r_c_c___c_r_s_init_type_def_ab8dd9da2b1da68ae09c30c7da19355a1}\index{RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}!ReloadValue@{ReloadValue}}
\index{ReloadValue@{ReloadValue}!RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}}
\doxysubsubsection{\texorpdfstring{ReloadValue}{ReloadValue}}
{\footnotesize\ttfamily \label{struct_r_c_c___c_r_s_init_type_def_ab8dd9da2b1da68ae09c30c7da19355a1} 
uint32\+\_\+t RCC\+\_\+\+CRSInit\+Type\+Def\+::\+Reload\+Value}

Specifies the value to be loaded in the frequency error counter with each SYNC event. It can be calculated in using macro {\bfseries{HAL\+\_\+\+RCC\+\_\+\+CRS\+\_\+\+RELOADVALUE\+\_\+\+CALCULATE(\+\_\+\+\_\+\+FTARGET}}, {\bfseries{FSYNC}}) This parameter must be a number between 0 and 0x\+FFFF or a value of \doxylink{group___r_c_c_ex___c_r_s___reload_value_default}{RCCEx CRS Reload\+Value\+Default} . \Hypertarget{struct_r_c_c___c_r_s_init_type_def_aea4064c542d29150a92632119b8e214d}\index{RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}!Source@{Source}}
\index{Source@{Source}!RCC\_CRSInitTypeDef@{RCC\_CRSInitTypeDef}}
\doxysubsubsection{\texorpdfstring{Source}{Source}}
{\footnotesize\ttfamily \label{struct_r_c_c___c_r_s_init_type_def_aea4064c542d29150a92632119b8e214d} 
uint32\+\_\+t RCC\+\_\+\+CRSInit\+Type\+Def\+::\+Source}

Specifies the SYNC signal source. This parameter can be a value of \doxylink{group___r_c_c_ex___c_r_s___synchro_source}{RCCEx CRS Synchro\+Source} 

The documentation for this struct was generated from the following file\+:\begin{DoxyCompactItemize}
\item 
C\+:/\+Users/\+ASUS/\+Desktop/dm-\/ctrl\+H7-\/balance-\/9025test/\+Drivers/\+STM32\+H7xx\+\_\+\+HAL\+\_\+\+Driver/\+Inc/\mbox{\hyperlink{stm32h7xx__hal__rcc__ex_8h}{stm32h7xx\+\_\+hal\+\_\+rcc\+\_\+ex.\+h}}\end{DoxyCompactItemize}
